VyperCore demonstrates FPGA RISC-V processor prototype

The prototype RISC-V FPGA system demonstrated at the RISC-V Europe event in Munich in July 2024 showcased VyperCore's unique capability to hardware accelerate the management of object-based memory, allowing software to remain focussed on mission-mode compute. Software running on the device repeatedly created large data structures of several thousand elements, then "forgot" the reference to the root object allowing the memory system to clean up the "dead" structures. The data structures formed by the software were selected to represent patterns seen commonly in real code such as singly and doubly linked lists, and rings.